1. Field of the Invention
The present invention relates to a multilayer circuit component and a method for manufacturing the same. In particular, the present invention relates to a multilayer circuit component having a structure in which at least two layers of glass-containing layers are provided on a substrate, and a method for manufacturing the same.
2. Description of the Related Art
Semiconductor elements, such as ICs, have hitherto been mounted on printed circuit substrates, such as glass epoxy substrates, and alumina ceramic substrates. In recent years, requirements for higher packing densities, finer wirings, higher transmission speeds, higher frequencies and higher heat dissipations of the semiconductor elements have been intensified.
Conventional printed circuit substrates, such as glass epoxy, do not always have sufficient properties regarding its through hole plating property, workability, multilayer adhesion property, thermal deformation resistance at a high temperature, etc., so that there is a limit in practice regarding the increase in density. Nevertheless, expectations for ceramic substrates having large mechanical strength and high thermal resistance are running high.
For example, an alumina substrate, which is one of the ceramic substrates, has large mechanical strength and superior thermal resistance, so that various multilayer circuit components have been developed in which fine wirings are provided on the alumina substrates, and furthermore, insulation layers provided with through holes are formed by a green sheet lamination method or a printing method.
For example, a laminated air-core coil used as an inductor is produced by repeating the steps of forming a coil (coil pattern) on an alumina substrate from a conductor paste, forming an insulation layer provided with a via hole thereon, filling the via hole with a conductor and forming a second layer of coil (coil pattern) on the insulation layer. Since a spiral type coil is produced, high inductance can be produced.
As the method for manufacturing the laminated air-core coil, a method in which a screen plate coated with a photosensitive emulsion, etc., for forming a predetermined pattern is produced, and then a paste is applied by printing on a substrate or an insulation layer through the resulting screen plate using, e.g. a squeegee, and a method in which a conductor paste having photo-hardening property is applied by printing on all over the surface of a substrate or an insulation layer with a spin coating method, etc., and then a coil is formed by exposure and development through a photomask provided with a desired pattern, are known.
As a method for forming an insulation layer provided with a via hole at which a part of a conductor pattern is exposed, in a manner similar to that in the aforementioned case of the formation of the coil, there are a method in which a coating of a paste is applied by a screen printing, and a method in which exposure and development are performed using a photosensitive paste. In addition, there is a method in which a green sheet is produced from a compound of an insulation powder and an organic binder, a through hole is formed by punching at a predetermined location of the green sheet, and thereafter, this is stacked on a substrate or an insulation layer provided with a conductor and is pressure-bonded.
For example, in the formation of a plurality of insulation layers containing glass on a ceramic sintered substrate made of alumina, etc., each of the insulation layers has been hitherto formed using the same material containing the same glass. When each of the insulation layers is, however, conventionally formed by coating and baking of a material in which the same type of glass is compounded, the wettability of the first insulation layer (first glass-containing layer) formed on the ceramic sintered substrate made of alumina, etc., relative to the sintered substrate and the wettability of the second insulation layer (second glass-containing layer) formed on the first glass-containing layer relative to the first glass-containing layer are different. This difference in the wettability affects the sinterability of each of the glass-containing layers to a large degree. That is, since large differences in the amount of baking shrinkages and in the shrinkage behavior occur due to the difference in the sinterability between the first glass-containing layer and the second glass-containing layer, there are problems in that remarkable warps occur in the substrates, and in particular, when the via hole is formed in each of the insulation layer, the diameter of the via hole is enlarged.
Table 1 shows wettabilities (contact angles) of borosilicate glass relative to an alumina substrate, a crystalline quartz (SiO2) substrate and a borosilicate glass substrate. The wettability of the glass can be evaluated by the contact angle, and when the wettability becomes better, the contact angle decreases.
TABLE 1Contact angle of borosilicate glass(SiO2:B2O3:(K2O = 79:19:2)Substraterelative to substrate at 1,000° C.Alumina 48°SiO2(Crystalline Quartz)140°Borosilicate Glass 8°(SiO2:B2O3:K2O = 79:19:2)
As shown in Table 1, the contact angle of the borosilicate glass relative to the alumina substrate, frequently used as the substrate of the multilayer circuit component, is 48°, the contact angle of the borosilicate glass relative to the crystalline quartz (SiO2) substrate is 140°, and the contact angle of the borosilicate glass relative to the borosilicate glass substrate (the contact angle of borosilicate glasses relative to each other) is 8°. Therefore, when comparisons are made between the alumina substrate and the borosilicate glass substrate, it is clear that the wettability of the glass relative to the alumina substrate is inferior by a large degree.
As a consequence, when the insulation layers (glass-containing layers) are laminated on the alumina substrate by a sequential baking method, in which the layers are baked one by one, since the insulation layer at the first layer (the first glass-containing layer) is baked on the alumina substrate, viscous flow is not likely to occur and the sinterability tends to be inferior. On the other hand, since the insulation layer at the second layer (the second glass-containing layer) formed on the first glass-containing layer is baked on the first glass-containing layer having excellent wettability, viscous flow starts early on, so that the sintering is likely to be accelerated compared to that in the case in which the first glass-containing layer is baked on the alumina substrate.
When the sinterability of the second glass-containing layer is improved, the baking shrinkages in the second glass-containing layer and glass-containing layers thereafter are accelerated, so that the diameters of the formed via holes become larger than that in the first layer. Accordingly, the exposure region is increased in excess of the required exposure region, and sometimes, not only the conductor pattern planned to be exposed, but also the conductor pattern adjacent thereto is exposed, so that when the via hole is filled with the conductor, a short circuit with the adjacent conductor pattern may occur, i.e., there is a circuit defect.
FIG. 1 shows a state of an insulation layer (the first glass-containing layer) 54a, provided with a via hole 53a and formed by applying a coating of an insulation material paste containing glass on a substrate 51, on which a conductor pattern (circuit) 52a is formed, and by baking, according to a conventional process for manufacturing a multilayer circuit component. FIG. 2 shows a state of an insulation layer (the second glass-containing layer) 54b, provided with a via hole 53b and formed by applying an insulation material paste containing glass on the first glass-containing layer 54a, on which conductor patterns (circuits) 52b and 52c are provided, and by baking.
As shown in FIGS. 1 and 2, according to the aforementioned conventional method for manufacturing the multilayer circuit component in which the same insulation material paste, with the same glass being compounded, is applied by coating and is baked, the baking shrinkage in the second glass-containing layer 54b is accelerated, so that the diameter of the via hole 53b of the second glass-containing layer 54b becomes larger than that of the via hole 53a in the first glass-containing layer 54a. Accordingly, when the via hole conductor 55 is introduced from the via hole 53b, there is a problem in that the via hole conductor 55 is not only connected to the planned conductor pattern 52b, but also short-circuited with the adjacent conductor patterns 52c exposed at the via hole 53b, so as to cause the short circuit defect.
Furthermore, since the residual stress of the substrate is unevenly generated due to the difference in the amounts of baking shrinkages, even when the properties, such as the thermal expansion and the thermal shrinkage, of the glass constituting the first glass-containing layer coincide with those of the substrate, the degree of the thermal shrinkage in the second glass-containing layer formed on the first glass-containing layer is different from that in the first glass-containing layer, so that a warp occurs in the substrate, and there is a problem in that the manufacture of the multilayer circuit component is difficult.